/*
 * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0 OR MIT
 */

#pragma once

#include <stdint.h>

#ifdef __cplusplus
extern "C"
{
#endif

//Interrupt hardware source table
//This table is decided by hardware, don't touch this.
typedef enum {
    ETS_SYS_ICM_INTR_SOURCE = 0,
    ETS_AXI_PERF_MON_INTR_SOURCE,
    ETS_USB_DEVICE_INTR_SOURCE,
    ETS_SDIO_HOST_INTR_SOURCE,
    ETS_SPI2_INTR_SOURCE,
    ETS_SPI3_INTR_SOURCE,
    ETS_I2S0_INTR_SOURCE,
    ETS_I2S1_INTR_SOURCE,
    ETS_UHCI0_INTR_SOURCE,
    ETS_UART0_INTR_SOURCE,
    ETS_UART1_INTR_SOURCE,
    ETS_UART2_INTR_SOURCE,
    ETS_UART3_INTR_SOURCE,
    ETS_LCD_CAM_INTR_SOURCE,
    ETS_PWM0_INTR_SOURCE,
    ETS_PWM1_INTR_SOURCE,
    ETS_PWM2_INTR_SOURCE,
    ETS_PWM3_INTR_SOURCE,
    ETS_TWAI0_INTR_SOURCE,
    ETS_TWAI0_TIMER_INTR_SOURCE,
    ETS_TWAI1_INTR_SOURCE,
    ETS_TWAI1_TIMER_INTR_SOURCE,
    ETS_RMT_INTR_SOURCE,
    ETS_I2C0_INTR_SOURCE,
    ETS_I2C1_INTR_SOURCE,
    ETS_TIMERGRP0_T0_INTR_SOURCE,
    ETS_TIMERGRP0_T1_INTR_SOURCE,
    ETS_TIMERGRP0_WDT_INTR_SOURCE,
    ETS_TIMERGRP1_T0_INTR_SOURCE,
    ETS_TIMERGRP1_T1_INTR_SOURCE,
    ETS_TIMERGRP1_WDT_INTR_SOURCE,
    ETS_LEDC0_INTR_SOURCE,
    ETS_LEDC1_INTR_SOURCE,
    ETS_SYSTIMER_TARGET0_INTR_SOURCE,
    ETS_SYSTIMER_TARGET1_INTR_SOURCE,
    ETS_SYSTIMER_TARGET2_INTR_SOURCE,
    ETS_AHB_PDMA_IN_CH0_INTR_SOURCE,
    ETS_AHB_PDMA_IN_CH1_INTR_SOURCE,
    ETS_AHB_PDMA_IN_CH2_INTR_SOURCE,
    ETS_AHB_PDMA_IN_CH3_INTR_SOURCE,
    ETS_AHB_PDMA_IN_CH4_INTR_SOURCE,
    ETS_AHB_PDMA_OUT_CH0_INTR_SOURCE,
    ETS_AHB_PDMA_OUT_CH1_INTR_SOURCE,
    ETS_AHB_PDMA_OUT_CH2_INTR_SOURCE,
    ETS_AHB_PDMA_OUT_CH3_INTR_SOURCE,
    ETS_AHB_PDMA_OUT_CH4_INTR_SOURCE,
    ETS_ASRC_CHNL0_INTR_SOURCE,
    ETS_ASRC_CHNL1_INTR_SOURCE,
    ETS_AXI_PDMA_IN_CH0_INTR_SOURCE,
    ETS_AXI_PDMA_IN_CH1_INTR_SOURCE,
    ETS_AXI_PDMA_IN_CH2_INTR_SOURCE,
    ETS_AXI_PDMA_OUT_CH0_INTR_SOURCE,
    ETS_AXI_PDMA_OUT_CH1_INTR_SOURCE,
    ETS_AXI_PDMA_OUT_CH2_INTR_SOURCE,
    ETS_RSA_INTR_SOURCE,
    ETS_AES_INTR_SOURCE,
    ETS_SHA_INTR_SOURCE,
    ETS_ECC_INTR_SOURCE,
    ETS_ECDSA_INTR_SOURCE,
    ETS_KM_INTR_SOURCE,
    ETS_RMA_INTR_SOURCE,
    ETS_GPIO_INTR0_SOURCE,
    ETS_GPIO_INTR1_SOURCE,
    ETS_GPIO_INTR2_SOURCE,
    ETS_GPIO_INTR3_SOURCE,
    ETS_CPU_INTR_FROM_CPU_0_SOURCE,
    ETS_CPU_INTR_FROM_CPU_1_SOURCE,
    ETS_CPU_INTR_FROM_CPU_2_SOURCE,
    ETS_CPU_INTR_FROM_CPU_3_SOURCE,
    ETS_CACHE_INTR_SOURCE,
    ETS_CPU_APM_M0_INTR_SOURCE,
    ETS_CPU_APM_M1_INTR_SOURCE,
    ETS_CPU_APM_M2_INTR_SOURCE,
    ETS_CPU_APM_M3_INTR_SOURCE,
    ETS_HP_MEM_APM_M0_INTR_SOURCE,
    ETS_HP_MEM_APM_M1_INTR_SOURCE,
    ETS_HP_MEM_APM_M2_INTR_SOURCE,
    ETS_HP_MEM_APM_M3_INTR_SOURCE,
    ETS_HP_MEM_APM_M4_INTR_SOURCE,
    ETS_HP_MEM_APM_M5_INTR_SOURCE,
    ETS_CPU_PERI0_TIMEOUT_INTR_SOURCE,
    ETS_CPU_PERI1_TIMEOUT_INTR_SOURCE,
    ETS_HP_PERI0_TIMEOUT_INTR_SOURCE,
    ETS_HP_PERI1_TIMEOUT_INTR_SOURCE,
    ETS_HP_APM_M0_INTR_SOURCE,
    ETS_HP_APM_M1_INTR_SOURCE,
    ETS_HP_APM_M2_INTR_SOURCE,
    ETS_HP_APM_M3_INTR_SOURCE,
    ETS_HP_APM_M4_INTR_SOURCE,
    ETS_HP_APM_M5_INTR_SOURCE,
    ETS_HP_APM_M6_INTR_SOURCE,
    ETS_HP_PERI0_PMS_INTR_SOURCE,
    ETS_HP_PERI1_PMS_INTR_SOURCE,
    ETS_CPU0_PERI_PMS_INTR_SOURCE,
    ETS_CPU1_PERI_PMS_INTR_SOURCE,
    ETS_MSPI_FLASH_INTR_SOURCE,
    ETS_LPI_INTR_SOURCE,
    ETS_PMT_INTR_SOURCE,
    ETS_SBD_INTR_SOURCE,
    ETS_USB_OTGHS_INTR_SOURCE,
    ETS_USB_OTGHS_ENDP_MULTI_PROC_INTR_SOURCE,
    ETS_JPEG_INTR_SOURCE,
    ETS_PPA_INTR_SOURCE,
    ETS_CORE0_TRACE_INTR_SOURCE,
    ETS_CORE1_TRACE_INTR_SOURCE,
    ETS_DMA2D_IN_CH0_INTR_SOURCE,
    ETS_DMA2D_IN_CH1_INTR_SOURCE,
    ETS_DMA2D_IN_CH2_INTR_SOURCE,
    ETS_DMA2D_OUT_CH0_INTR_SOURCE,
    ETS_DMA2D_OUT_CH1_INTR_SOURCE,
    ETS_DMA2D_OUT_CH2_INTR_SOURCE,
    ETS_DMA2D_OUT_CH3_INTR_SOURCE,
    ETS_MSPI_PSRAM_INTR_SOURCE,
    ETS_HP_SYSREG_INTR_SOURCE,
    ETS_PCNT0_INTR_SOURCE,
    ETS_PCNT1_INTR_SOURCE,
    ETS_HP_PAU_INTR_SOURCE,
    ETS_HP_PARLIO_RX_INTR_SOURCE,
    ETS_HP_PARLIO_TX_INTR_SOURCE,
    ETS_ASSIST_DEBUG_INTR_SOURCE,
    ETS_MODEM_WIFI_MAC_INTR_SOURCE,
    ETS_MODEM_WIFI_MAC_NMI_INTR_SOURCE,
    ETS_MODEM_WIFI_PWR_INTR_SOURCE,
    ETS_MODEM_WIFI_BB_INTR_SOURCE,
    ETS_MODEM_BT_MAC_INTR_SOURCE,
    ETS_MODEM_BT_BB_INTR_SOURCE,
    ETS_MODEM_BT_BB_NMI_INTR_SOURCE,
    ETS_MODEM_LP_TIMER_INTR_SOURCE,
    ETS_MODEM_COEX_INTR_SOURCE,
    ETS_MODEM_BLE_TIMER_INTR_SOURCE,
    ETS_MODEM_BLE_SEC_INTR_SOURCE,
    ETS_MODEM_I2C_MST_INTR_SOURCE,
    ETS_MODEM_ZB_MAC_INTR_SOURCE,
    ETS_MODEM_BT_MAC_INT1_INTR_SOURCE,
    ETS_CORDIC_INTR_SOURCE,
    ETS_ZERO_DET_INTR_SOURCE,
    ETS_LP_WDT_INTR_SOURCE,
    ETS_LP_TIMER_REG_0_INTR_SOURCE,
    ETS_LP_TIMER_REG_1_INTR_SOURCE,
    ETS_MB_HP_INTR_SOURCE,
    ETS_MB_LP_INTR_SOURCE,
    ETS_PMU_REG_0_INTR_SOURCE,
    ETS_PMU_REG_1_INTR_SOURCE,
    ETS_LP_ANAPERI_INTR_SOURCE,
    ETS_LP_ADC_INTR_SOURCE,
    ETS_LP_DAC_INTR_SOURCE,
    ETS_LP_GPIO_INTR_SOURCE,
    ETS_LP_I2C_INTR_SOURCE,
    ETS_LP_SPI_INTR_SOURCE,
    ETS_LP_TOUCH_INTR_SOURCE,
    ETS_LP_TSENS_INTR_SOURCE,
    ETS_LP_UART_INTR_SOURCE,
    ETS_LP_EFUSE_INTR_SOURCE,
    ETS_LP_SW_INTR_SOURCE,
    ETS_LP_TRNG_INTR_SOURCE,
    ETS_LP_SYSREG_INTR_SOURCE,
    ETS_LP_APM_M0_INTR_SOURCE,
    ETS_LP_APM_M1_INTR_SOURCE,
    ETS_LP_APM_M2_INTR_SOURCE,
    ETS_LP_APM_M3_INTR_SOURCE,
    ETS_LP_PERI0_PMS_INTR_SOURCE,
    ETS_LP_PERI1_PMS_INTR_SOURCE,
    ETS_LP_HUK_INTR_SOURCE,
    ETS_LP_PERI_TIMEOUT_INTR_SOURCE,
    ETS_LP_AHB_PDMA_IN_CH0_INTR_SOURCE,
    ETS_LP_AHB_PDMA_IN_CH1_INTR_SOURCE,
    ETS_LP_AHB_PDMA_OUT_CH0_INTR_SOURCE,
    ETS_LP_AHB_PDMA_OUT_CH1_INTR_SOURCE,
    ETS_LP_SW_INVALID_SLEEP_INTR_SOURCE,
    ETS_MAX_INTR_SOURCE,
} periph_interrupt_t;

extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];

#ifdef __cplusplus
}
#endif
